An anti-fuse can be configured in a planar arrangement with a source, a drain, and a channel situated in a semiconductor substrate. A programmable gate is situated over the channel and includes a gate electrode situated over a gate dielectric. The gate dielectric initially provides a high-resistance current path between the gate electrode and the channel of the anti-fuse. The anti-fuse can be programmed by applying a programming voltage across the gate electrode and the channel so as cause breakdown of the gate dielectric. Once programmed, the current path changes from high-resistance to low-resistance to facilitate current flow through the current path.